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ERROR(ORCIS-6250): ODBC Error (Timeout Query)
Hi Guys, our Orcad 16.6 CIS search parts in a view running on an sql server.Often, when we try to search part we get the following timeout error:ERROR(ORCIS-6250): ODBC Error Code: -1Description:...
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Why it must have virtual interface initialized for an embedded covergroup...
Refer to the code as below, assignment of vif in build_phase() or connet() will result in different behavior. Anyone can explain a bit for this?Thanks.class apb_cov extends uvm_component; virtual...
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Is it a must to declare with keyword 'virtual' when define a task in a child...
Look into the code as below, the task whoAmI() is not declared using 'virtual', but when calling it from class B, it actually get B's task executed. Then it seems that the 'virtual' keyword is not...
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How to tell which test(seed) contributes to a specified coverpoint?
From the imc tool, we just know whether a coverpoint has been covered or not. Moreover, is there any way to check which test case just contribute to a coverpoint?Thanks.
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ncsim *N COVAUO message
Look into the ncsim log below, the covergroup instances, through are in the same covergoup type, do have their own names. Then why ncsim still output such *N message? Is there any potential risk, or...
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Display signals in Simvision
Is there a simple way to display all probed signals in Simvision?I have 21000 signals probed during the simulation and dumped to shm file. I want to display them all in simvision, but don't want to...
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Avoid compiling Verilog/sytemVerilog views every time you netlist (AMS).
Hi,I would like to know if is possible to avoid compiling the Verilog/sytemVerilog views every time you generate an AMS netlist in ADE-L (based on a config file with a sytemVerilog template).The...
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*E,SOSSZI Slice size for streaming concatenation expression has an illegal value
Hi,As I attempt to perform stream operation as below,bit[3:0] v_b[16];bit[31:0] v_a;v_a = { << $size(v_b, 2) {v_a}};It will give the error message "*E,SOSSZI Slice size for streaming...
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lib.map load order anomaly
I encountered the following anomaly:If my lib.map contains these clauses in this order: library mapped "{mapped netlist}"; library rtl "{behavioral model #1"; library rtl "{behavioral model #2";...
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Embedded cover group got started automatically?
Hi,I've defined a covergroup in a class and then instantiate an object of that class. Usually it needs to call start() method to start coverage collection.But I just found that covergroup exists in the...
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How to check the range for each bins in covergroup?
Say now we have a covergroup which is intended to cover the 32-bit range of 'h0 ~ 'hFFFFFFFF.logic [31:0] test_data;covergroup test_cg @clk option.per_instance = 1; v: coverpoint test_data...
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IMC Code Coverage : vRefine for reading waivers.
Hi, I am using the IMC tool for coverage analysis, I use the vRefine files to load the waivers which help me to waive the design-code that is not expected to be covered. But if the Design changes...
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What if inheritance occurs for a class with an embedded covergroup?
As the code shown below, what is the relationship between those two covergroup named cg? class A; int a; covergroup cg @(clk); option.per_instance = 1; v_a: coverpoint a iff(reset){} endgroup // cg...
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SystemVerilog "interface class"
Hi,Which version of ncvlog supports the 1800-2012 "interface class" ?Thanks,Charles
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[ncsim: *W,DLWNEW:] How to locate the intermediate file?
Hi,I just ran into the warning as below,ncsim: *W,DLWNEW:Intermediate file module ma.ma_rst:module (VST) is newer thanexpected by snapshot worklib.top_dut:sv (SSS)actual: Wed Jul S 15:55:31...
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[PROBLEM_STRING FAILED] What could be the causes for this error message?
I found an error message starting withPROBLEM_STRING FAILEDBut I don't catch the causes of such error. As the literal mentioned, is it related to the problematic string? If so, I'm even confused that...
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How to suppress the prefix of path when launch imc?
Hi,Suppose I have some *ucm and *ucd files at hand, however, I have to launch imc on some other workstation where the source files path happens to be different from the one saved in *ucm or &...
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Analog value fetch functions : issue with incisiv 15.20.004
Hi All,I am using $cgav and $caiv functions in TB to access a analog signal value and I get following error.ncsim: *E, MSSYSTF ..... User Defined system task or function ($caiv) registered during...
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Issue related to use of cadence analog fetch function $cgav with a multi-bit...
Hi,I am running into following issue. I have a signal adc_do which is 6 bit width and when AMS netlist is generated it is defined as output [5:0] adc_do in analog module. When I use...
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False GLS timing violation being reported from irun for Functional D input in...
Hi I am running GLS sims for atpg vector,I am getting violation for D input even when ATPG Select (SEL) signal is high and it is TD (test Data) input which matters.Following is the task $setuphold in...
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