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How to run multiple tests in parallel
In my previous company, when we run regressions, the tests are run in parallel which makes the regression finish faster.There is an already-made script that do that.Well, I'm not familiar how did they...
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compare VerilogA result with SystemVerilog result
Hi to everyone.I made my circuit in verilogA with the code and circuit part. The simulation is very slow, so I made the systemverilog model.Now I would compare the results. In some Cadence slide I saw...
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Simvision issue when representing an array of byes
hi theresimvision (14.10-s007) does not shows up in the hierarchy browser the following output portoutput byte data[ 3:0]i think the byte is considered as a logic [7:0] data type underneathbtw I cannot...
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Hyperlinks for file and time using $display(), similar to uvm_info
Dear everyone,I am pretty new using SimVision and I would be interested in how the uvm_info function is generating hyperlinks for the file and time!Could anyone please give me some information about...
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simvision, get when a cover assertion was hit
Hi all,In simvision, given an assertion, is there a way to get all the timestamps when the assertion was hit?Thanks.
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Adding -xprop option causes license issue
When I add the -xprop option, a license issue suddenly appears. It says unable to checkout license.But when I remove this, I'm able to run simulation. Is there an issue with it or am I doing it...
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Create System Verilog library
Hi everyone,I finally finish the model of my circuit in System Verilog. There are digital parts and analog parts, it's composed by 15 .sv file and one testbench. Now I would know if is possible to...
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Tool for tracing x propagation
Hi,Does Cadence have such tool that can trace where x propagation originates?Thanks.Regards,Reuben
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simvision: how to add all signals in design to waves
Hello, What are the fewest commands to add all signals in design to waveform viewer? Thanks, SysTom
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UVM variables in waveform aren't displayed instantly
Hello everyone,I am using a basic UVM Layered Sequences example which is also introduced here:https://www.doulos.com/knowhow/sysverilog/uvm/easier_uvm_guidelines/layering/My problem is that when I...
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What is FUNTSK? A fun task?
I figured out what FUNTSK is but I could not find any canonical list of *Errors and *Warnings for ncsim - do it exist?Thanks, Tom
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Simulator ignores attributes during elaboration
Hey everyone,Does anyone have a good experience with the instantiation of different cells in the same verilogams file?I'm building a testbench and want to instantiate two instances that have the same...
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irun/ncsim/ncvlog SystemVerilog support options
I see the following options for SystemVerilog in irun/ncsim/ncvlog. Why are there two options for SV 2005 and 2009.What option to use for the latest SystemVerilog 2012(IEEE 1800-2012 SystemVerilog)...
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ISSUE : Cumulative coverage issue in IMC
Hi, I've about 400 test cases to merge all the individual coverage data bases to one output file with use of IMC. I've found the following error during merging process;merge...
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ISSUE: Merging coverage databases for more than 100 testcases
Hi, I've about 400 test cases to merge all the individual coverage data bases to one output file with use of IMC. I'm using below IMC version;IMC(64): 14.10-s011: (c) Copyright 1995-2014 Cadence...
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SimVision: Print to ps
I try priniting a SimVision Waveform into a .ps (via File->Print Window...), but whenever i do it i get a corrupted file. I tried open it with various tools. They all say "corrupted file" or just...
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ncsim problem in AMS simulation
Hi all,I am facing a problem when I am trying to simulate verilog code along with analog blocks using the AMS simulator. This is how the story goes:Initially, with IUS-8.2 installed I was able to...
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AmsDmv command line problems
Hi,I recently started using the amsDmv tool to compare results from two different cell views. I was trying to open amsDmv from command line using the command "amsDmv" in the UNIX terminal, however I...
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AmsDmv issue with measured results field
Hi,I used the amsDmv to compare ADE-XL results for two different config views, and after the completion of the simulation, I observe that the measured results field says "No valid measured results...
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EEnet resistor model?
How to model an simple resistor in SV ?This is what i have at this moment:module res_RNM(P,N);import EE_pkg::*;inout EEnet P,N;parameter res=1.0;.....endmodule
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