irun passing real-time data to a running external application
Hello,I am thinking about to post-process and show the data from the irun simulator in external application in the real time. For example I generate the screen data sending HDMI and Java/C++/TK/Python...
View ArticleHow do I control probe start/stop in ncsim from embedded CPU?
I am running an RTL simulation with an embeddd CPU and some encryption logic. The CPU runs some codes to check the result of encryption logic and can run hours or days. My idea is to let the CPU...
View ArticleHow do I pass a string from irun to my DPI-C codes?
I use DPI-C to compile a C code and run with irun. Assume I wish to pass a testcase directory to my C and Verilog codes. I managed to do it for Verilog but not my C code. #!/bin/ksh#TC=$2TC=TEST_1irun...
View ArticleQuery regarding the ncelab: *F,CUHUNL fatal
Hi Team,I set up a very basic mixed signal simulation environment with two inverters (one in sch and the other in verilog). I set up the HED with functional view for the verilog inverter and its...
View ArticleStatement covrage is n/a after running and merging testcase coverage results
For my project I setup the coverage flow usung IMC(64) 17.04-s001.When all coverage is assembled and monitoring the overview in IMC gui I noticed that line statement figures is not present. It is...
View ArticleGetting Elaboration Error *E,BIGOBJ
Hi Team, We have developed multimedia scoreboard used to verify the output packet against reference data. We are getting elaboration error from uvm_scoreboard with following error...
View ArticleCompilation error with xcelium
Hi, I get the following error after compiling the testbench with xcelium - "ERROR - 2018/11/08 11:13:08 - __main__ - ABORT, Compile Error, Due to a message of severity 'Compile Error' matching...
View Article-access option in irun
I was hoping some one would help understand the function of the access option used with irun. The irun guide said that the option is passed to the elaborator to provide read, write or connectivity...
View ArticleDoes irun support interface classes (SV 1800-2012) ?
Hello,I'm using irun(64) 15.20-s046. When declaring an interface class I get a compilation error: Not a valid package item: 'interface_declaration'Is this an irun version issue?Are interface classes...
View ArticleCadence Spectre Design Simulation
Hello. I'm new to Spectre and Spice.I've just created a .scs file, in which I have to write the testbench for the synthesized module inside the imported .v file.include "library_path"simulator lang =...
View ArticleJasper Gold formal connectivity verification :: Reverse connectivity...
Hi,I am using jg connectivity app to get the connection between to modules.After compilation and elaboration of my design I am using following command >> check_conn -generate_candidates -src abc...
View ArticleGrammar of language E about check that
Hi, allI find the syntax of "check that" in Specman E language reference is as follows:Syntaxcheck [[name] that] bool-exp [[then] true-block] [else dut-error-action]So I can add some actions if the...
View ArticleDownload documentation from Cadence page
Hello,Please help to download Xclelum tool documentation from Cadence web, I searched a lot but could not find where the documentioant of the tools are located in the WEb page.ThanksHayk
View ArticleHow to suppress glitch caused by Expression Calculator in Simvision?
Hi,I putted an expression like,dut.arvalid===1 && dut.arready===1 && dut.araddr < 'hA0000000 && dut.araddr > 'h90000000and found some glitch in the waveform,Is that glitch...
View Articlehow to enlarge simulation time limit of ncsim?
I have a very large simulation case which should run 12000 seconds (simulation time, not CPU time). But I find that ncsim will stop after about 9223s. It seems that ncsim(e.g. irun) has a maximum...
View ArticleIs it possible to create two vcd files during the same simulation
I have to create two vcd files. One which starts at zero time and ends when a specific signal changes, and one which start right after.Is it possible to do it with xceliun by tcl commands?
View ArticleProving 2 tasks in formal simulation one after the other
Hello,I have 2 tasks that I want to prove in Jasper Gold. The problem is, the constraints of one conflict with the constraints of the other making it unreachable. pin_A is an internal node.task -create...
View Articleeliminate multiple comments in the excluded signals in IMC
Hi everyone,I'm working with IMC and when i read multiple Vrefines files the excluded signals get multiple comments, i need to know if there is any way to eliminate the extra comments ? Thanks
View ArticleElaboration Error ICDPAV on xcelium
Hi,I am facing this elaboration error message when using xcelium:xmelab: *E,ICDPAV (......) Illegal combination of driver and procedural assignment to variable dmp_oob_aout detected (output clockvar...
View Articlencsim: Error within protected source code.
Hello all,I'm a fairly new user to SimVision and I having some difficulty with my simulation environment. Continually I am getting the following error:ncsim: *E,ERRIPR: error within protected source...
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