Clik here to view.
ncsim: *E,DENOTS: No time specification given for value: after
Why is the error message generated in my simulation run. I've run the simulation for a while, this is the first time I saw this message pop up.Thanks for your input.
View ArticleClik here to view.
NCVHDL simulation error
Sir, am getting this error when trying to elaborate the design[root@localhost simulation]# ncelab WORK.trial:trial_rtlncelab: 10.20-p008: (c) Copyright 1995-2010 Cadence Design Systems, Inc.ncelab:...
View ArticleClik here to view.
Connecting VHDL port to system verilog interface definition in UVM
I have a package definition in VHDL which contains the user defined array type which is the output of my DUT.The definition is as below:TYPE loop_reg_ty IS RECORD loop_index_value :...
View ArticleClik here to view.
Error in Elaboration in UVM environment
I am trying to test the VHDL DUT in UVM environment and as i can see using the libverbose all the units are properly resolved when i used irun and it shows error in elaboration as below :irun:...
View ArticleClik here to view.
Disabling single signals in expression coverage?
I am running expression coverage on a design. There are many ATPG multiplexers implemented in RTL, such aswire signal = aptg_mode ? something : something_else;Expression coverage complains that, since...
View ArticleClik here to view.
How to exclude a register or bit in IMC by certain value
Hi,I'm using IMC to do the coverage.I have successfully exclude instance and module, both in ccf file and manually by hand; also I have found the toggle view, which can exclude a certain bit's, rise or...
View ArticleClik here to view.
Merge conflict with iccr
Hi, I'm wondering if there is a bkm to resolve a merge conflict.I have been running iccr merge just fine until I had to fix one of the coverpoints. Now I'm getting a coverpoint not merged - description...
View ArticleClik here to view.
About timing precision of sdf file simulated in ncsim
Hello Every, Thank you for your kindness in advance.Here is my problemI find my ncsim can only simualte the sdf file in precision of 10ps （round to 10ps）For exampe，This is a simple BUF sdf...
View ArticleClik here to view.
set/reset inversion
Hi all,Any condition a DFF/DLAT will be remodel to BUF/INV ?I get a message that LEC remodel due to set/reset inversion.
View ArticleClik here to view.
"Unrecognized system task or function"">failed to generate .saif using "irun" command -> "Unrecognized system task or...
Hi,I failed to generate .saif using "irun" commandAll my function i tried to use: $read_rtl_saif, $set_toggle_region, $toggle_start, $toggle_stop, $toggle_report are being warned as "Unrecognized...
View ArticleClik here to view.
merging code coverage with different .ccf
Hi,Is it possible to merge two code coverage DB's of same RTL but with different coverage configuration files (ccf).thanks in advancemarsun
View ArticleClik here to view.
Facing issue while running ncelab step after ncverilog
Hello,I am facing this issue while running ncelab step. I have ran ncverilog and it passed .I am running it from the command line and i am getting the following errorDEFINE lib_std...
View ArticleClik here to view.
Spice Model for VPWL_F_RE_FOREVER
I want to use VPWL_F_RE_FOREVER in a circuit but I am not able to find the pspice models for source library. Please help me in suggesting how can I get the models or an alternative solution to the...
View ArticleClik here to view.
Help with Optimizer (model parameters)
Greetings.Is there some way to use Optimizer (Orcad PSpice 16.5) in order to optimize model parameters (in the actual case, N and IS of a diode) and achieve fitting of the experimental data?I read on...
View ArticleClik here to view.
Simulation error: "Line too long. Limit is 132 characters."
I'm simulating a 3rd-party Spice model of a transistor using OrCAD PSpice. After I hit run, it starts to generate a .cir file which is when the following error shows up:Line too long. Limit is 132...
View ArticleClik here to view.
Getting SWIFT internal error:bad call of realloc:Failed to allocate block
I am using following commands to save a checkpoint and later on wanted to restore it in order to create a snapshot,Commands used arencsim>stop -object test.active ncsim>runncsim>run...
View ArticleClik here to view.
How to correctly run specman with ncsim ?
Hello,I started to experiment with VHDL+Specman. I wrote some code and now I want to simulate VHDL and E together. I use following command to run the simulation:specview ncsim -gui -cdslib...
View ArticleClik here to view.
Getting ERROR when I try to save and restore waveform.
When I try to save a checkpoint, so that I can restore it later.But when I try the below command,ncsim> save checkpoint_1I am getting the below error,Message! [SDI/Verilog]...
View ArticleClik here to view.
Idea of scoreboard checking in Specman needed
Hello all,I have DUT which generates certain combination on two outputs. My idea is to use keyed list, somehow fill the values in and somehow implement the coverage on that keyed list.struct dut_output...
View ArticleClik here to view.