uvm help needed
I am a newbee for uvm. Looking for some understaning on using uvm_tes/uvm_env under module.IUS allows me using uvm_env under module but not uvm_test or uvm-agent , throwing below error -" class...
View ArticleElaboration error in SVA binding file
Hi, While running the testcase with IUS 11.10.002, I am getting following error fo SVA binding file. ncelab: *E,NOBNDT: Bind target module not found Any clue on resolving this error? Thanks,Pinakin
View ArticleHelp needed on temporal expressions with detach
Hi everyone I am having trouble in writing a temporal expression using detach construct in e langauge. Any help is greatly appreciated. There are two events A and B in my environment. everytime...
View Articleforcing the creation of a vcd file
Hello,How do I instruct simvision to force the creation of a vcd file? I am trying to create tcl script to dump signals into a vcd file and then immediately post-process this very vcd.These are the two...
View ArticleUsing Dynamically Allocated Memories (PLI)
Hi I am using cadence's pli for dynamically allocated memories. for system tasks:damem_inith - there is one argument which needs file name in the following format:"bin.dat". I would like to replace it...
View ArticleControlling timescale while exporting database
Hello,I am trying to export a VCD database using the following command:simvision -submit "database export $my_signals -format vcd -name my_vcd.vcd"That works fine but the VCD timescale is not the...
View ArticleError : Overflow, divider cannot be zero
Hi All, I am using a vr ahb (eVC) and i get this error "Overflow, divider cannot be zero" . I have no clue how to debug this error. Coud anyone please throw some light on thsi error?
View ArticleLoading Coverage Databases
Hello,I am facing some issues while trying to merge coverage data from two tests with different ucd and ucm file names.The test names are test_1(icc_000.ucm, ic_000.ucd) and test_2(icc_001.ucm,...
View ArticleVirtual interface in UVM
HI , I am wondering who is calling assign_vi virtual function while connecting interface of different members under Agent?// Assign the virtual interfaces of the agent's children function void...
View ArticleIncremental Compilation in Emanager
Hi All, I am using enterprise manager. During regression design files are getting compiled for all the testcases. How to compile it for one file and use it for the rest of the tests.This incremental...
View ArticleHow to get the activity power in Simvision
Dear all, I'm using simvision to analysis activity power. Here is the command I used: read_vcd -vcd_module dut -module top -activity_profile -start_time 10000 -end_time 30000 -simvision...
View ArticleDeclaring array of uniquely parameterized classes
In my SystemVerilog environment, I have an array of a class typefor which I need to customize instantiation parameters for each class in the array. With all classes the same, I can do my_class...
View ArticleNC_MIRROR help
Hi can any one suggest some useful resource for using nc_mirror utility in VHDL. Or even for that matter the syntax of it.Regards
View ArticleGenerate random MIN and MAX value from a range of values
Hi All, I would like to know if there is any efficient way to generate a random min and max value from a range of values?i have a range VAL1 to VAL2... I need to generate a min_val and max_value...
View Articlehelp needed on the use Scemi2.0 Pipe between OVM tb and HDL
Hello, I want to use the scemi2.0 pipe to connect a ovm TB with a RTL DUT. In ovm side, I use the ovm_accel_pkg. I made an every simple example, in which a ovm_accel_input_pipe_proxy is used in the...
View ArticleUsing Eplanner with UVM
I am trying to implement checkers in my UVM environment from my vPlan and to map them in Eplanner. However, in the Eplanner I can only see the checks that I implemented as assertions in interfaces but...
View ArticleVerification Plan using Eplanner
Hi.... Can anybody explain me How to map checkers(check that statement) into vplan using eplanner? Thanks!
View ArticleUsing interface signals as coverpoint bins
Hi, I have my functional coverage like this:class mem_cov_grp;virtual SysRegIntf;covergroup walks();level: coverpoint SysRegIntf.Addr { bins MAX = {31- SysRegIntf.Tag};...
View ArticleHow to filter X -> 0 or X -> 1 from signals for events
Hi all, I am having problem in filtering the changes from x->1 and x->0 on a singal which i use to generate events. For example, I have a simple port "a" of type in,...
View Article"INTERNAL EXCEPTION" when ncsim
Hi all, When I run a project using ncsim, and find the fatal error, which is list as below, I want to know how can I detect the error more deeper. INTERNAL EXCEPTIONObserved simulation time : 0 FS +...
View Article