Hello,
I am implementing a 10-bit sar adc using cadence. I have been stuck in the SA Register part. I am using 22 numbers of D-Flipflops. The single flip-flop circuit is functioning absolutely fine and all the 11 flip flips on the upper row in the below screenshot I have attached, are acting absolutely fine when the Q of one flip flop is connected to the D of the next flip flop. I am getting Q low and Qbar high in each flip flop of the upper row. Now when I am connecting the below flipflops and completing the register circuit, I am not getting the desired bit output, Can anyone please help me?
I am attaching the screenshots of the schematic and output pattern below.Image may be NSFW.
Clik here to view.
Image may be NSFW.
Clik here to view.
Image may be NSFW.
Clik here to view.
Image may be NSFW.
Clik here to view.
