Hi,
I have a question regarding ncsim digital simulation. Hope this is the right place to post.
I have a huge design that takes a long time to compile and elaborate before starting the sim. For every sim I only modify one file(top level systemverilog testbench). But I need to compile and elaborate all the files to generate the snapshot and then run simulation. It takes about 10 mins for this process. Since I am only modifying one file is there a way to selectively compile and elaborate only that file in order to save time. Some kind of incremental build. I am aware of the -R option in irun, but it does not incorporate the changes that I made to the one file in question.
Another related question: There is a possibility that other design files might have also changed over time. But is there a way to make sure that the incremental compile and elaborate happens only to the one file in question while discarding the changes(if any) made to other files.