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Internal error during elabration phase

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Hi,

I am facing the below error when i tried to simulate a simple verilog environment,is this the tool setup issue w.r.t my source file or something other,please help me out.

 

Writing initial simulation snapshot: worklib.tb_counter:v
ncsim: *F,INTERR: INTERNAL ERROR
Observed simulation time : 0 FS + 0
-----------------------------------------------------------------
The tool has encountered an unexpected condition and must exit.
Contact Cadence Design Systems customer support about this
problem and provide enough information to help us reproduce it,
including the logfile that contains this error message.
  TOOL:    ncsim    08.20-s012
  HOSTNAME: ucmlin004
  OPERATING SYSTEM: Linux 2.6.9-55.3.ELsmp #1 SMP Thu May 17 18:31:38
EDT 2007 x86_64
  MESSAGE: Unexpected signal #11, program terminated (null)
-----------------------------------------------------------------
TOOL:    irun    08.20-s012: Exiting on Sep 04, 2012 at 17:14:44 IST 
(total: 00:00:03)

 

Regards

kaleem.


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