I'm trying to implement TFET model in Cadence Virtuoso using Verilog-a. I'm able to create a symbol for it, but when I try to simulate it by using it in a test circuit, I get an error stating "Cannot compile ahdlcmi module library". I read another forum (link), which had smilar problem, and there the problem was 32bit - 64bit. The server on my side is 32 bit. Can someone explain what the issue actually could be and what can be the solution for it?
Link to the log file: https://drive.google.com/open?id=1lScnyFlemYKnhQ2tFMYHh1sgrVqDVU1s