Hello,
So I am seeing this weird behavior in my simulation where a register captures a value but nothing in the input logic cone has changed.
For e.g.,
a <= (b & c) | (!d) | (~e &f)
where a is non zero at the rising edge of the clock but b,c,d,e,f are unchanged. I am suspecting that one of them has a glitch which gets captured by "a". Although I can't see any glitches in my waveform.
Is there an environment variable that will enabling capturing glitches?
Thanks and Regards,