I have a vhdl code that has the following lines:
library ieee;
use ieee.std_logic_1164.all
library encode_8b10b;
library decode_8b10b;
The Cadence simulator is complaining about the encode_8b10b and decode_8b10b libraries:
"logical library name must be mapped to design library.
I tried putting the following into the cds.lib file:
define encode_8b10b ./INCA_libs/worklib
define decode_8b10b ./INCA_libs/worklib
That did not seem to work.
Anyone know how to map these libraries?
Thanks