Hi all,
i am getting stuck on simulating systemverilog code in cadence... DPI related systemverilog code is running under some other tool I need to run that code in cadence.
I compile systemverilog[*.sv] and *.CPP file using following command.
system verilog :
ncverilog +define+$testcase+$mode +sv -f compile_list.f +ncdpiheader+dpi.h +elaborate +ncelabargs+-messages
=>dpi.h is created...
CPP:
g++ -g -march=x86-64 -Wall -O2 -fPIC -I../cpp -include../dpi.h -I/`ncroot`/tools/inca/include -c $(sources_cpp) -DCADENCE
g++ -march=x86-64 -shared *.o -o $(TARGET)
$(TARGET) => shared library file *.so
Simulation:
in simulation i need to include that above shared library *.so
what is the command line argument for simulate
=> ncsim +sv_lib=../*.so +access+r+w +ncsimargs+"-sv_root ./" .?....
Kindly help me for this issue...
Thanks,
selvavinayakam.na