Hello everyone. I'm using XRUN to compile/elab and simulate a design with a single command:
xrun <opts>
This is a basic SystemVerilog design, I've also added the following statements to the top module
$recordfile("output.trn");
$recordvars();
This, as far as I know, should dump the database to be later viewed with SimVision.
I'm able to see most of the signals, but there are some signals that are not probed and I don't know how to force dumping/probing of all available signals.
If I dump a .VCD it shows all signals but then I lose abilities like proper Enumerate printing, which I need.
Can anyone please help me out? Thanks